dc.contributor.author | Yıldız, Nerhun | en_US |
dc.contributor.author | Cesur, Evren | en_US |
dc.contributor.author | Tavşanoğlu, Ahmet Vedat | en_US |
dc.date.accessioned | 2020-03-16T11:35:26Z | |
dc.date.available | 2020-03-16T11:35:26Z | |
dc.date.issued | 2016 | |
dc.identifier.citation | Cesur, E., Yıldız, N. & Tavşanoǧlu, A. V., (2016). On the way to a third generation real-time cellular neural network processor. Paper presented at the International Workshop on Cellular Nanoscale Networks and their Applications, 35-36. | en_US |
dc.identifier.isbn | 9783800742523 | |
dc.identifier.issn | 2165-0160 | |
dc.identifier.uri | https://hdl.handle.net/11729/2283 | |
dc.description.abstract | In this proceeding, the architecture of a third generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v3) is disclosed, which is a digital CNN emulator to be implemented on an FPGA device. The previous generation emulator, RTCNNP-v2, is the only CNN implementation reported to be capable of processing full-HD 1080p@60 (1080×1920 resolution at 60 Hz frame rate) video images in real-time. However, there are some weaknesses in both the design and implementation of RTCNNP-v2, like the inability to process different parts of the video images in parallel, lack of support for recording and recalling intermediate frames using external memory and it has some jitter issues at computation rates above 200 MHz. All of those issues are addressed in the next architecture of our CNN emulator, RTCNNP-v3, which is being implemented of an FPGA device. | en_US |
dc.language.iso | en | en_US |
dc.publisher | IEEE Computer Society | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Algorithms | en_US |
dc.subject | Cellular neural networks | en_US |
dc.subject | Design and implementations | en_US |
dc.subject | External memory | en_US |
dc.subject | Field programmable gate arrays (FPGA) | en_US |
dc.subject | FPGA devices | en_US |
dc.subject | Frame rate | en_US |
dc.subject | Full HD | en_US |
dc.subject | Image processing | en_US |
dc.subject | Nanotechnology | en_US |
dc.subject | Network architecture | en_US |
dc.subject | Nonlinear networks | en_US |
dc.subject | Real time | en_US |
dc.subject | Third generation | en_US |
dc.subject | Video image | en_US |
dc.title | On the way to a third generation real-time cellular neural network processor | en_US |
dc.type | Conference Object | en_US |
dc.description.version | Publisher's Version | en_US |
dc.relation.journal | International Workshop on Cellular Nanoscale Networks and their Applications | en_US |
dc.department | Işık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümü | en_US |
dc.department | Işık University, Faculty of Engineering, Department of Electrical-Electronics Engineering | en_US |
dc.authorid | 0000-0001-8590-1518 | |
dc.identifier.volume | 2016-08 | |
dc.identifier.startpage | 35 | |
dc.identifier.endpage | 36 | |
dc.peerreviewed | Yes | en_US |
dc.publicationstatus | Published | en_US |
dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
dc.institutionauthor | Tavşanoğlu, Ahmet Vedat | en_US |
dc.indekslendigikaynak | Scopus | en_US |