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A bit-serial sum of absolute difference accelerator for variable block size motion estimation of H.264
(IEEE, 2009)
Bit-serial architectures offer a number of attractive features over their bit-parallel counterparts such as smaller area cost, lower density interconnection, a reduced number of pins, higher clock frequency, simpler routing ...
3-D Mesh geometry compression with set partitioning in the spectral domain
(IEEE-INST Electrical Electronics Engineers Inc, 2010-02)
This paper explains the development of a highly efficient progressive 3-D mesh geometry coder based on the region adaptive transform in the spectral mesh compression method. A hierarchical set partitioning technique, ...
Wavelet-based image compression by hierarchical quantization indexing
(IEEE, 2009)
In this paper, we introduce the quantization index hierarchy, which is used for efficient coding of quantized wavelet coefficients. A hierarchical classification map is defined in each wavelet subband, which describes the ...
H.264 vi̇deo kodlamada B-çerçeveler i̇çi̇n kodçözücü tarafında aday devi̇ni̇m vektör seçi̇mi̇
(IEEE, 2012-04-18)
H.264 standardında devinim vektör farklarının kodlanması sebebiyle özellikle düşük bit hızlarında nesne sınırlarında devinimdeki ani değişiklikler harcanan bit miktarlarını artırmaktadır. Bu bildiride B-çerçevelerde kod ...