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Toplam kayıt 7, listelenen: 1-7
CMOS high-performance UWB active inductor circuit
(Institute of Electrical and Electronics Engineers Inc, 2016)
In order to maximize efficiency of the designed gyrator-based active inductor, advanced circuit techniques are used. Loss and noise are most important features of the AIs, where they should be low enough to have high-performance ...
A low loss, low voltage and high Q active inductor with multi-regulated cascade stage for RF applications
(Institute of Electrical and Electronics Engineers Inc., 2015)
Numerous structural planning of active inductors have been proposed as of not long ago in literature which showing tuning conceivable outcomes, low chip area and offering integration facility, they constitute promising ...
Design of a new low loss fully CMOS tunable floating active inductor
(Springer New York LLC, 2016-12)
In this paper, a new tunable floating active inductor based on a modified tunable grounded active inductor is proposed. The multi regulated cascade stage is used in the proposed active structure to decrease the parasitic ...
Metamutator applications: a quadrature MOS only oscillator and transconductance/transimpedance amplifiers
(Springer New York LLC, 2016-06-18)
NMOS based circuit realizations of a sinusoidal quadrature oscillator, a transconductance, a transimpedance amplifier are presented. All the circuits are constructed with a voltage-mode “Metamutator” consisting of an analog ...
Construction of the nodal conductance matrix of a planar resistive grid and derivation of the analytical expressions of its eigenvalues and eigenvectors using the Kronecker Product and Sum
(IEEE, 2016-07-09)
This paper considers the task of constructing an (MxN+1)-node rectangular planar resistive grid as: first forming two (MxN+1)-node planar sub-grids; one made up of M of (N+1)-node horizontal, and the other of N of (M+1)-node ...
MOS only oscillator using adder and subtractor circuits
(IEEE, 2015)
In this paper an NMOS based sinusoidal oscillator is presented. The circuit is constructed with voltage-mode (VM) NMOS-based analog adder and subtractor circuits which respectively perform V-1+V-2 and V-1-V-2 operations ...
Analysis and design of low-cost bit-serial architectures for motion estimation in H.264/AVC
(Springer, 2013-05)
Variable block-size motion estimation (VBSME) process occupies a major part of computation of an H.264 encoder, which is usually accelerated by bit-parallel hardware architectures with large I/O bit width to meet real-time ...