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Low complexity inter-mode selection for H.264
(IEEE, 2006)
The coding efficiency of the H.264/AVC standard enables the transmission of high quality video over bandwidth limited networks. Due to the use of multiple Macroblock (MB) partitions, the Motion estimation module has extremely ...
A bit-serial sum of absolute difference accelerator for variable block size motion estimation of H.264
(IEEE, 2009)
Bit-serial architectures offer a number of attractive features over their bit-parallel counterparts such as smaller area cost, lower density interconnection, a reduced number of pins, higher clock frequency, simpler routing ...
Decoder side true motion estimation for very low bitrate b-frame coding
(IEEE, 2011)
In H.264 standard, coding of motion vectors constitutes a significant portion of total bitrate especially at low bitrate regimes. This is because differential coding of motion vectors is inefficient when the bit budget is ...
Decoder-side super-resolution and frame interpolation for improved H.264 video coding
(IEEE, 2013)
In literature decoder-side motion estimation is shown to improve video coding efficiency of both H.264 and HEVC standards. In this paper we introduce enhanced skip and direct modes for H.264 coding using decoder-side ...
H.264 vi̇deo kodlamada B-çerçeveler i̇çi̇n kodçözücü tarafında aday devi̇ni̇m vektör seçi̇mi̇
(IEEE, 2012-04-18)
H.264 standardında devinim vektör farklarının kodlanması sebebiyle özellikle düşük bit hızlarında nesne sınırlarında devinimdeki ani değişiklikler harcanan bit miktarlarını artırmaktadır. Bu bildiride B-çerçevelerde kod ...