Now showing items 1-4 of 4
Analysis and Design of Low-Cost Bit-Serial Architectures for Motion Estimation in H.264/AVC
Variable block-size motion estimation (VBSME) process occupies a major part of computation of an H.264 encoder, which is usually accelerated by bit-parallel hardware architectures with large I/O bit width to meet real-time ...
Enhanced low bitrate H.264 video coding using decoder-side super-resolution and frame interpolation
(SPIE-SOC PHOTO-OPTICAL INSTRUMENTATION ENGINEERS, 2013-07)
Advanced inter-prediction modes are introduced recently in literature to improve video coding performances of both H.264 and High Efficiency Video Coding standards. Decoder-side motion analysis and motion vector derivation ...
Decoder-side super-resolution and frame interpolation for improved H.264 video coding
In literature decoder-side motion estimation is shown to improve video coding efficiency of both H.264 and HEVC standards. In this paper we introduce enhanced skip and direct modes for H.264 coding using decoder-side ...
H.264 standardı için süper-çözünürlük tabanlı kodlama yaklaşımı
In literature video coding efficiency of H. 264 standard has been improved using decoder-side super-resolution (SR). In this paper SR estimation is used during encoding in place of skip/direct mode prediction of H. 264 ...