Now showing items 1-4 of 4
Analysis and Design of Low-Cost Bit-Serial Architectures for Motion Estimation in H.264/AVC
Variable block-size motion estimation (VBSME) process occupies a major part of computation of an H.264 encoder, which is usually accelerated by bit-parallel hardware architectures with large I/O bit width to meet real-time ...
Decoder-side super-resolution and frame interpolation for improved H.264 video coding
In literature decoder-side motion estimation is shown to improve video coding efficiency of both H.264 and HEVC standards. In this paper we introduce enhanced skip and direct modes for H.264 coding using decoder-side ...
Decoder side true motion estimation for very low bitrate b-frame coding
In H.264 standard, coding of motion vectors constitutes a significant portion of total bitrate especially at low bitrate regimes. This is because differential coding of motion vectors is inefficient when the bit budget is ...
H.264 vi̇deo kodlamada B-çerçeveler i̇çi̇n kodçözücü tarafında aday devi̇ni̇m vektör seçi̇mi̇
In H.264 standard, because of differential coding of motion vectors, sudden motion changes in object boundaries increase the amount of bits used for coding especially at low bitrate regimes. In this paper, we propose a ...