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Toplam kayıt 4, listelenen: 1-4
Fast algorithm analysis and bit-serial architecture design for sub-pixel motion estimation in H.264
(World Scientific Publishing Company, 2010-12)
The sub-pixel motion estimation (SME), together with the interpolation of reference frames, is a computationally extensive part of the H.264 encoder that increases the memory requirement 16-times for each reference frame. ...
A survey of algorithms and architectures for H.264 sub-pixel motion estimation
(World Scientific, 2012-05)
This paper reviews recent state-of-the-art H. 264 sub-pixel motion estimation (SME) algorithms and architectures. First, H.264 SME is analyzed and the impact of its functionalities on coding performance is investigated. ...
A cost-efficient bit-serial architecture for sub-pixel motion estimation of H.264/AVC
(IEEE Computer Soc, 2008)
This paper presents a new VLSI architecture for sub-pixel motion estimation in H.264/AVC encoder. It is based on an interpolation free algorithm that causes a high level reduction on memory requirement, hardware resources ...
An algorithm and its architecture for half-pixel variable block size motion estimation
(IEEE, 2007)
This paper presents an accurate half-pixel variable block size motion estimation algorithm and its hardware architecture. The proposed algorithm does not require interpolation of the reference frame pixels and has near ...