Design of a new low loss fully CMOS tunable floating active inductor

Abstract

In this paper, a new tunable floating active inductor based on a modified tunable grounded active inductor is proposed. The multi regulated cascade stage is used in the proposed active structure to decrease the parasitic series resistance of active inductor, thus the Q factor enhancement is obtained. Furthermore, the arrangement of this stage leads to the smaller input transistor which determines active inductor’s self-resonance frequency and to be free of body effect which is crucial in sub-micron technology. Symmetrical design strategy has enabled both ports of the proposed floating active inductor to demonstrate the same properties. The Q factor and active inductor value are tuned with bias current and flexible capacitance (varactor), respectively. The self-resonance frequency of floating active inductor (~6.2 GHz) is almost the same as grounded prototype. In addition, the proposed active inductor also shows higher quality factor and inductance value compared to the conventional floating active inductor circuits. To show the performance of suggested circuit, simulations are done by using a 0.18 µm CMOS process, which demonstrates an adjustable quality factor of 10–567 with an inductance value range of 6–284 nH. Total DC power consumption and occupied area are 2 mW and 934.4 µm2, respectively.