dc.contributor.author | Şavkay, Osman Levent | en_US |
dc.contributor.author | Cesur, Evren | en_US |
dc.contributor.author | Yıldız, Nerhun | en_US |
dc.contributor.author | Yalçın, Mustak Erhan | en_US |
dc.contributor.author | Tavşanoğlu, Ahmet Vedat | en_US |
dc.date.accessioned | 2019-06-27T18:40:37Z | |
dc.date.available | 2019-06-27T18:40:37Z | |
dc.date.issued | 2014 | |
dc.identifier.citation | Şavkay, O. L., Cesur, E., Yıldız, N., Yalçın, M. E. & Tavşanoğlu, A. V. (2014). Realization of processing blocks of CNN based CASA system on CPU and FPGA. Paper presented at the 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2081-2084. doi:10.1109/ISCAS.2014.6865576 | en_US |
dc.identifier.isbn | 9781479934324 | |
dc.identifier.isbn | 9781479934317 | |
dc.identifier.issn | 0271-4302 | |
dc.identifier.issn | 2158-1525 | |
dc.identifier.uri | https://hdl.handle.net/11729/1636 | |
dc.identifier.uri | http://dx.doi.org/10.1109/ISCAS.2014.6865576 | |
dc.description.abstract | In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM device as a working prototype. The software implementation of the track initialization, track maintenance, data validation and classification blocks of the processing part are implemented on a Zynq7000 ARM Cortex-A9 processor. In the preprocessing part, a real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. The CASA system introduced in this paper is capable of processing full-HD 1080p@60 (1080 x 1920) video images in real-time. | en_US |
dc.language.iso | eng | en_US |
dc.publisher | IEEE | en_US |
dc.relation.isversionof | 10.1109/ISCAS.2014.6865576 | |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Semen Characteristics | en_US |
dc.subject | Image processing | en_US |
dc.subject | IIR filters | en_US |
dc.subject | Bandpass filters | en_US |
dc.subject | ARM processors | en_US |
dc.subject | Cellular neural networks | en_US |
dc.subject | Computer aided analysis | en_US |
dc.subject | Image processing | en_US |
dc.subject | Data validation | en_US |
dc.subject | Hardware optimization | en_US |
dc.subject | Image processing algorithm | en_US |
dc.subject | Prototyping process | en_US |
dc.subject | Reconfigurable infrastructures | en_US |
dc.subject | Software implementation | en_US |
dc.subject | Track initialization | en_US |
dc.subject | Track maintenance | en_US |
dc.subject | Video signal processing | en_US |
dc.title | Realization of processing blocks of CNN based CASA system on CPU and FPGA | en_US |
dc.type | conferenceObject | en_US |
dc.description.version | Publisher's Version | en_US |
dc.relation.journal | 2014 IEEE International Symposium on Circuits and Systems (ISCAS) | en_US |
dc.contributor.department | Işık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümü | en_US |
dc.contributor.department | Işık University, Faculty of Engineering, Department of Electrical-Electronics Engineering | en_US |
dc.contributor.authorID | 0000-0001-8590-1518 | |
dc.identifier.startpage | 2081 | |
dc.identifier.endpage | 2084 | |
dc.peerreviewed | Yes | en_US |
dc.publicationstatus | Published | en_US |
dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
dc.contributor.institutionauthor | Tavşanoğlu, Ahmet Vedat | en_US |
dc.relation.index | WOS | en_US |
dc.relation.index | Scopus | en_US |
dc.relation.index | Conference Proceedings Citation Index – Science (CPCI-S) | en_US |
dc.description.wosid | WOS:000346488600522 | |