Architecture of a Fully Pipelined Real-Time Cellular Neural Network Emulator
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CitationYildiz, N., Cesur, E., Kayaer, K., Tavsanoglu, V., & Alpay, M. (2015; 2014). Architecture of a fully pipelined real-time cellular neural network emulator. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 62(1), 130-138. doi:10.1109/TCSI.2014.2345502
In this paper, architecture of a Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v2) is given and the implementation results are discussed. The proposed architecture has a fully pipelined structure, capable of processing full-HD 1080p@60 (1920 1080 resolution at 60 Hz frame rate, 124.4 MHz visible pixel rate) video streams, which is implemented on both high-end and low-cost FPGA devices, Altera Stratix IV GX 230, and Cyclone III C 25, respectively. Many features of the architecture are designed to be either pre-synthesis configurable or runtime programmable, which makes the processor extremely flexible, reusable, scalable, and practical.