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Yayın Time-domain high speed ADC circuits(Işık Üniversitesi, Lisansüstü Eğitim Enstitüsü, 2025-06-30) Mohamed, Moaamen Magdy Abdelrazek; Köprü, Ramazan; Işık Üniversitesi, Lisansüstü Eğitim Enstitüsü, Elektrik-Elektronik Mühendisliği Yüksek Lisans Programı; Işık University, School of Graduate Studies, Electric-Electronics Engineering M.S. ProgramThis thesis delivers the design, simulation, and performance analysis of two high-resolution Time-to-Digital Converters (TDCs), both achieved by means of the Vernier Delay Line (VDL) principle and in 100 nm CMOS technology. Two different architectural strategies designed for diverse signal control and edge detection needs are presented, targeting sub-nanosecond time resolution and GHz-range applications compatibility. The first architecture uses two voltage-to-time converters (VTCs) for generating accurate START and STOP signals from the ramp nature of the inputs. These are processed by a Vernier Delay Line with overlapped buffers and overlap-sensitive 5-transistor TSPC flip-flops, spotting the accurate coincidence point of signals. This resultant thermometer code is then encoded by a MUXbased Gray code encoder and a resistor-ladder digital-to-analog converter (DAC) in order to reconstruct the analog signal. This combination is set up for fine timing resolution and high precision. The design in the second option simplifies the signal generation block by employing a single VTC together with a periodic pulse (Vpulse) generator for producing the START and STOP signals. In this design, edge-triggered flipflops are incorporated in the delay line for detecting rising edges, allowing for improved and more consistent timing in high-frequency applications. The output is encoded by way of a binary encoder with a tree structure and then passed into the same DAC employed in the first design. This system is designed for highspeed operation and simplicity of architecture. Both designs were simulated in the Cadence Virtuoso environment and examined in MATLAB with respect to critical performance characteristics like resolution, differential non-linearity (DNL), conversion time, and power consumption. They both prove to yield consistent, CMOS-compatible solutions for accurate time interval quantization in applications up to the GHz level, with flexibility for applications with diverse signal control schemes.
