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Yayın Design of a new low loss fully CMOS tunable floating active inductor(Springer New York LLC, 2016-12) Momen, Hadi Ghasemzadeh; Yazgı, Metin; Köprü, Ramazan; Saatlo, Ali NaderiIn this paper, a new tunable floating active inductor based on a modified tunable grounded active inductor is proposed. The multi regulated cascade stage is used in the proposed active structure to decrease the parasitic series resistance of active inductor, thus the Q factor enhancement is obtained. Furthermore, the arrangement of this stage leads to the smaller input transistor which determines active inductor’s self-resonance frequency and to be free of body effect which is crucial in sub-micron technology. Symmetrical design strategy has enabled both ports of the proposed floating active inductor to demonstrate the same properties. The Q factor and active inductor value are tuned with bias current and flexible capacitance (varactor), respectively. The self-resonance frequency of floating active inductor (~6.2 GHz) is almost the same as grounded prototype. In addition, the proposed active inductor also shows higher quality factor and inductance value compared to the conventional floating active inductor circuits. To show the performance of suggested circuit, simulations are done by using a 0.18 µm CMOS process, which demonstrates an adjustable quality factor of 10–567 with an inductance value range of 6–284 nH. Total DC power consumption and occupied area are 2 mW and 934.4 µm2, respectively.Yayın Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays(IEEE-INST Electrical Electronics Engineers Inc, 2005-12) Çiçek, İhsan; Bozkurt, Ayhan; Karaman, MustafaIntegration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 x 4 array of the designed circuit cells, each cell occupying a 200 x 200 mu m(2) area, was formed for the initial test studies and scheduled for fabrication in 0.8 mu m, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.Yayın Metamutator based universal, single input multi output current mode filter(John Wiley and Sons Ltd, 2023-03) Göknar, İzzet Cem; Minayi, ElhamThe introduction of Add - Differentiate IC, AD-IC, a new integrated circuit, into schemes for realizing single input multiple output current mode filters is the motivation behind this paper. In the circuit structure of this filter with only one active device with a minimal number of transistors and five passive components are being used. Non ideal effects of the design are investigated and simulation results of the application, using TSMC 0.25 ?m process parameters with ±1.25 V power supply voltage and the bias (Formula presented.) as 0.8 V resulting in 0.99 mW power dissipation for the entire filter, are also presented to confirm the theoretical analysis. With this new design technique, the tunabilities of the angular frequency ((Formula presented.)) and quality factor ((Formula presented.)) can be performed independently.Yayın Design of voltage-mode and current-mode PID controllers using a single Add-Differentiate IC (AD-IC)(Birkhauser, 2025-12-22) Minayi, Elham; Göknar, İzzet CemIn this paper, voltage and current mode proportional–integral–derivative (PID) controller circuits are presented in one topology, utilizing only a single active component, Add-Differentiate Integrated Circuit (AD-IC) along with two passive resistors and two passive capacitors. The effectiveness and performance of the proposed circuits are validated through sensitivity, non-ideality analyses and PSPICE and MatLab simulations.
