Arama Sonuçları

Listeleniyor 1 - 7 / 7
  • Yayın
    A priority based packet scheduler with deadline considerations
    (IEEE Computer Soc, 2006) Dağ, Tamer; Gökgöl, Oral
    QoS issues have become a focal point of research on Next Generation Networks (NGNs). In order to supply the various QoS requirement for different kinds of applications, new scheduling policies need to be developed and evaluated. This paper introduces a new kind of packet scheduler which tries to integrate an important QoS parameter (the delay) with the classical schedulers. The two sets of algorithms introduced; Static Priority with Deadline Considerations (SPD) and Dynamic Priority with Deadline Considerations (DPD); not only simplify the complexity and overhead of a classical Earliest Deadline First (EDF) or Static Priority (SP) algorithm, but also provide a better QoS based on the results of the simulations conducted.
  • Yayın
    An Analog beamformer for integrated high-frequency medical ultrasound imaging
    (IEEE, 2011) Gürün, Gökçe; Zahorian, Jaime; Tekeş, Coşkun; Karaman, Mustafa; Hasler, Paul E.; Değertekin, Fahrettin Levent
    We designed and fabricated a dynamic receive beamforming integrated circuit (IC) in 0.35-mu m CMOS technology. This beamformer is suitable for integration with an ultrasound annular array for high-frequency (30-50 MHz) intravascular ultrasound (IVUS) imaging. The beamformer IC is capable of buffering, delaying and preamplification for 8 receive channels. We explored an analog delay cell based on a currentmode first-order all-pass filter, which is used as the basic building block to form an analog dynamic delay line. We also explored a bandwidth enhancement method on the delay cell that improved the overall bandwidth of the delay line by a factor of 6. Each delay cell consumes 2.1 mW of power and is capable of generating a tunable delay between 1.75 ns to 2.5 ns, enabling dynamic receive beamforming over a focal range from 1.4 mm to 2 mm. We successfully integrated the fabricated beamformer IC with an 8-element annular array. Our experimental test results demonstrated the desired buffering, preamplification and delaying capabilities of the beamformer.
  • Yayın
    SPD (Static Priority with Deadline considerations) packet scheduling algorithm for achieving better QoS
    (IEEE, 2007) Dağ, Tamer
    Providing quality of service (QoS) to applications with different traffic characteristics based on their needs is an important research area for today's and tomorrow's high speed networks. Various techniques have been proposed to achieve good QoS for diverse application types. Among these techniques, packet scheduling algorithms decide on how to process packets at network nodes; however they have limited support for better QoS. In order to supply the various QoS requirements for different kinds of applications, new scheduling policies need to be developed and evaluated. This paper proposes a new kind of packet scheduling algorithm, Static Priority with Deadline Considerations (SPD), which integrates an important QoS parameter (the delay) into the classical static priority packet scheduling algorithm and analyses the packet losses by considering the two different components of losses; buffer overflows and deadline violations. The proposed algorithm not only reduces the complexity of the static priority algorithm by introducing degree sorting but also solves the starving problem and provides fairness to applications with different priorities.
  • Yayın
    Subarray delta-sigma beamforming for ultrasonic imaging
    (IEEE, 2002) Bilge, Hasan Şakir; Karaman, Mustafa
    We present a beamforming architecture based on subarray processing with non-uniform oversampling 1-bit delta-sigma (??) modulation. The subarray processing combines conventional phased array and synthetic aperture approaches to form a large aperture using small subarrays thus reduces active channel count. ??-based beamforming improves the efficiency of front-end processing further: oversampling permits precise delaying and single bit data processing simplifies beamforming operation. To reduce the number of firings we use a low beam density associated with the subarray size, and then increase the beam density by lateral interpolation prior to coherent beam summation. Our experimental test results show that the proposed scheme provides high-resolution beamforming while simplifying the front-end.
  • Yayın
    Achievable rates for the three user cooperative multiple access channel
    (IEEE, 2008) Edemen, Çağatay; Kaya, Onur
    For a three user Gaussian multiple access channel (MAC), we propose a new superposition block Markov encoding based cooperation scheme. Our scheme allows the three users to simultaneously cooperate both in pairs, and collectively, by dividing the transmitted messages into sub messages intended for each cooperating partner. The proposed encoding and decoding at the transmitters take into account the relative qualities of the cooperation links between the transmitters. We obtain and evaluate the achievable rate region based on our encoding strategy, and compare it with the achievable rates for the two user cooperative MAC. We demonstrate that the added diversity by the presence of the third user improves the region of achievable rates, and this improvement is especially significant as far as the sum rate of the system is concerned.
  • Yayın
    An algorithm and its architecture for half-pixel variable block size motion estimation
    (IEEE, 2007) Fatemi, Mohammad Reza Hosseiny; Salleh, Rosli Bin; Ateş, Hasan Fehmi
    This paper presents an accurate half-pixel variable block size motion estimation algorithm and its hardware architecture. The proposed algorithm does not require interpolation of the reference frame pixels and has near performance to the conventional interpolation-search methods. These simplifications cause high level reduction in computational time and gate count without the need for internal or external half-pixel accuracy search memory. A simple, low latency, high throughput and fully utilized pipelined architecture of proposed algorithm is implemented in VHDL The proposed hardware architecture uses shift registers for multiplication and pipelining technique and can support half-pixel accuracy variable block size motion estimation for the real time HDTV format (1920 x1280 resolution and 30 Frames/sec).
  • Yayın
    A tunable analog delay element for high-frequency dynamic beamforming
    (IEEE, 2009) Gürün, Gökçe; Şişman, Alper; Zahorian, Jaime S.; Satır, Sarp; Karaman, Mustafa; Hasler, Paul E.; Değertekin, Fahrettin Levent
    Implementing beamforming for high frequency arrays is challenging because of the accurate delay requirements at high frequencies. High frequency digital beamforming is not suitable for catheter based applications as a large number of cables is required between the array and the external beamformer. A possible solution is to perform analog beamforming on an integrated circuit adjacent or monolithically integrated to the imaging array. In this study, we introduce an improved voltage in voltage out low pass filter as an analog delay cell for high frequency dynamic beamformers. This circuit can generate three times more delay with a given bandwidth when compared to conventional low pass filters. Delay of the circuit is tunable and the gain of the cell is inherently very close to unity. The proposed delay cell operates single ended and therefore is more suitable for CMUT operation which generates single ended output. We designed a test beamformer for a 30MHz, equal area, annular array with 100% bandwidth using the proposed delay cell and the unit-delay focusing architecture. Required delays are implemented using a delay line made up of improved delay elements with tunable delays. To demonstrate functionality we designed and fabricated a custom front-end IC in a 0.5µm standard CMOS process. The IC chip consists of 8 transimpedance amplifiers, voltage-to-current converters, the analog dynamic beamformer, and two buffers. We present results of preliminary imaging experiments that demonstrate the focusing capability.