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Toplam kayıt 16, listelenen: 11-16
Analysis and design of low-cost bit-serial architectures for motion estimation in H.264/AVC
(Springer, 2013-05)
Variable block-size motion estimation (VBSME) process occupies a major part of computation of an H.264 encoder, which is usually accelerated by bit-parallel hardware architectures with large I/O bit width to meet real-time ...
Decoder side true motion estimation for very low bitrate b-frame coding
(IEEE, 2011)
In H.264 standard, coding of motion vectors constitutes a significant portion of total bitrate especially at low bitrate regimes. This is because differential coding of motion vectors is inefficient when the bit budget is ...
Rate-distortion and complexity joint optimization for fast motion estimation in H.264 video coding
(IEEE, 2006)
H.264 video coding standard offers several coding modes including inter-prediction modes that use macroblock partitions with variable block sizes. Choosing a rate-distortion optimal mode among these possibilities contributes ...
Fast algorithm analysis and bit-serial architecture design for sub-pixel motion estimation in H.264
(World Scientific Publishing Company, 2010-12)
The sub-pixel motion estimation (SME), together with the interpolation of reference frames, is a computationally extensive part of the H.264 encoder that increases the memory requirement 16-times for each reference frame. ...
Low complexity inter-mode selection for H.264
(IEEE, 2006)
The coding efficiency of the H.264/AVC standard enables the transmission of high quality video over bandwidth limited networks. Due to the use of multiple Macroblock (MB) partitions, the Motion estimation module has extremely ...
Fast inter-mode decision and selective quarter-pel refinement in H.264 video coding
(IEEE, 2008)
In H.264 video coding standard, there exist several inter - prediction modes that use macroblock partitions with variable block sizes. Choosing a rate-distortion optimal coding mode for each macroblock is essential for the ...