• A bit-serial sum of absolute difference accelerator for variable block size motion estimation of H.264 

  Fatemi, Mohammad Reza H.; Ates, Hasan Fehmi; Salleh, Rosli (IEEE, 2009-07-25)

  Bit-serial architectures offer a number of attractive features over their bit-parallel counterparts such as smaller area cost, lower density interconnection, a reduced number of pins, higher clock frequency, simpler routing ...

• An Analog beamformer for integrated high-frequency medical ultrasound imaging 

  Gürün, Gökçe; Zahorian, Jaime; Tekeş, Coşkun; Karaman, Mustafa; Hasler, Paul; Değertekin, F. Levent (IEEE, 2011-11-10)

  We designed and fabricated a dynamic receive beamforming integrated circuit (IC) in 0.35-mu m CMOS technology. This beamformer is suitable for integration with an ultrasound annular array for high-frequency (30-50 MHz) ...

• Experimental Study of Dual-Ring CMUT Array Optimization for Forward-Looking IVUS 

  Tekeş, Coşkun; Zahorian, Jaime; Gürün, Gökçe; Satir, Sarp; Hochman, Michael; Xu, Toby; Rashid, M. Wasequr; Değertekin, F. Levent; Karaman, Mustafa (IEEE, 2011-10-18)

  Forward-looking (FL) catheters have guiding and volumetric imaging capacities which are highly desirable for IVUS applications. Large channel and firing counts have to be reduced to enable 3-D real-time imaging and simplify ...

• Jointly Optimal Chunk and Power Allocation in Uplink SC-FDMA 

  Mert, Teoman; Kaya, Onur; Çırpan, Hakan Ali (IEEE, 2013-06-09)

  For a single carrier frequency division multiple access (SC-FDMA) system, we obtain the jointly optimal power and chunk allocation policies which maximize the sum rate. Our solution is applicable to both localized and ...

• Bir Otomatik Hedef Tanıma Algoritmasının Geliştirilmesi 

  Aldemir, Erdoğan; Yıldız, Nerhun; Tavşanoğlu, Vedat (IEEE, 2013-04-24)

  In this study, first, an Automated Target Recognition/Tracking (ATR, ATT) system is analyzed, developed and simulated on Matlab environment. Second, a new edge detection method is proposed which is obtained by combining ...

• A New Speech Coding Algorithm using Zero Cross and Phoneme Based SYMPES 

  Şişman, Burak; Güz, Ümit; Gürkan, Hakan; Yarman, Bekir Sıddık Binboğa (IEEE, 2013-07-11)

  In this work, a new low bit rate hybrid speech coding approach which combines the benefits of the SYMPES (Systematic Procedure for Predefined Envelope and Signature Sequences) and zero cross and phoneme based segmentation ...

• A Novel Computed Tomography Image Compression Method based on Classified Energy and Pattern Blocks 

  Gökbay, İnci Zaim; Gezer, Murat; Güz, Ümit; Gürkan, Hakan; Yarman, Bekir Sıddık Binboğa (IEEE, 2013-07-11)

  In this work, a new biomedical image compression method is proposed based on the classified energy and pattern blocks (CEPB). CEPB based compression method is specifically applied on the Computed Tomography (CT) images and ...

• Special issue on Cognitive radio: The road for its second decade 

  Baddour, Kareem E.; Bar-Ness, Yeheskel; Dobre, Octavia A.; Öner, Mengüç; Serpedin, Erchin; Spagnolini, Umberto (Elsevier Science BV, 2013-12)

• A High Precision Cascade Synthesis Technique for Real Frequency Matching Involving Brune and Darlington Type-C Sections 

  Yarman, Binboğa Sıddık; Aksen, Ahmet; Köprü, Ramazan; Aydın, Çağatay; Atilla, Doğu Çağdaş (IEEE, 2014-12-12)

  In this work, we introduce a high precision cascade synthesis technique for lossless matching networks involving Brune and Darlington Type-C sections. In the present manuscript, we generalized our previously introduced ...

• Design of Tunable Amplifier Using Digital Capacitors 

  Atilla, Doğu Çağdaş; Aydın, Çağatay; Nesimoğlu, Tayfun; Köprü, Ramazan; Aksen, Ahmet; Yarman, Binboğa Sıddık (IEEE, 2014-12-12)

  In recent days, radio manufacturers are increasingly interested in broadband amplifiers for cellular communication. Demands of customers enforce manufacturers to develop systems compatible for all standards and it is ...

• Realization of Processing Blocks of CNN Based CASA system on CPU and FPGA 

  Şavkay, O. Levent; Cesur, Evren; Yıldız, Nerhun; Yalçın, Mustak E. (IEEE, 2014-06-01)

  In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM ...

• Design of a Third Generation Real-Time Cellular Neural Network Emulator 

  Yıldız, Nerhun; Cesur, Evren; Tavşanoğlu, Vedat (IEEE, 2014-07-29)

  In this paper, the features of the next generation Real-Time Cellular Neural Network Processor (RTCNNP-v3) are discussed. The RTCNNP-v2 structure is the only CNN implementation that is reported to be capable of processing ...

• A Systematic approach to the time-domain computation of the impulse response and post-initial conditions of causal LTI systems at the origin 

  Tavşanoglu, Ahmet Vedat (IEEE, 2015-05-24)

  This paper presents a systematic approach to the computation of the impulse response in the time domain at the origin and post-initial conditions of an N-th-order causal SISO LTI system differential equation. It is shown ...

• RFT Based Multiband Matching Network Design with Foster Resonance Sections 

  Yıldız, Serkan; Aksen, Ahmet; Binboğa Yarman, Bekir Sıddık (IEEE, 2015-11-26)

  A new method for a multi band matching network design is introduced in this paper. Foster resonance sections are used to create transmission zeros. This effect brings gain degradation at Transducer Power Gain (TPG) of the ...

• Transformerless Bandpass Matching Network Design for Y-Shaped Monopole Antenna 

  Çağatay, Aydın; Doğu, Çağdaş Atilla; Karakuş, Cahit; Köprü, Ramazan; Yarman, Sıddık (IEEE, 2015-11-26)

  In this paper, a transformerless bandpass matching network design procedure is presented. The Real Frequency Techniques are powerful numerical methods to design wideband lossless 2-port networks such that filters and ...

• MOS only oscillator using adder and subtractor circuits 

  Yıldız, Merih; Göknar, Cem; Minaei, Shahram (IEEE, 2015-11-26)

  In this paper an NMOS based sinusoidal oscillator is presented. The circuit is constructed with voltage-mode (VM) NMOS-based analog adder and subtractor circuits which respectively perform V-1+V-2 and V-1-V-2 operations ...

• VİSKON-RS : Uzaktan algılama ile hızlı afet hasar analiz yazılımı 

  Kahraman, Fatih; İmamoglu, Mümin; Ozan, Büşra Y.; Huruoğlu, Cengiz; Alasağ, Tolga; Gemici, Ömer F.; Hocaoğlu, Muhammet A.; Ateş, Hasan Fehmi (IEEE, 2015-05-16)

  After a disaster, a rapid damage assessment is required for coordinating emergency response teams and planning emergency aid. In this study, in line with AFAD requirements, ViSKON-RS software was developed for the aim of ...

• Karma CPU + FPGA Yapısı Üzerinde Tasarlanmış Bilgisayar Destekli Sperm Analizi Sistemi 

  Savkay, Osman Levent; Tavşanoglu, Vedat; Yalçın, Müştak Erhan; Cesur, Evren (IEEE, 2015-05-16)

  In this paper a Computer Assisted Semen Analysis (CASA) system designed on a hybrid CPU + FPGA hardware platform is presented. Multiple moving object tracking technique is used for spermatozoa motility analysis and an ...

• Çok-hipotezli süperpikseller ile sahne bölütleme ve etiketleme 

  Ateş, Hasan Fehmi; Ak, Kenan E. (IEEE, 2015-05-16)

  Superpixels recently gained in importance in image segmentation and classification problems. In scene labeling the image is initially segmented into visually consistent small regions using a superpixel algorithm; then, ...

• Extension of conventional co-training learning strategies to three-view and committee-based learning strategies for effective automatic sentence segmentation 

  Dalva, Doğan; Güz, Ümit; Gürkan, Hakan (IEEE, 2018)

  The objective of this work is to develop effective multi-view semi-supervised machine learning strategies for sentence boundary classification problem when only small sets of sentence boundary labeled data are available. ...

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