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Toplam kayıt 19, listelenen: 11-19
Dual band matching network design via real frequency technique by mapping from a band pass prototype
(IEEE, 2016)
In this study, a new method of design for dual band matching network is presented. A transformer-less Band Pass (BP) prototype matching network is synthesized with well-known Simplified Real Frequency Technique (SRFT) via ...
A method for low-pass filter designing by commensurate transmission lines
(IEEE, 2016)
It is well known that the complex Richards-Plane is a transformed domain of Laplace-Plane which is obtained under a tangent hyperbolic mapping. Network functions generated in terms of Richards's frequency are periodic in ...
A new high performance CMOS active inductor
(IEEE, 2016)
A new high-performance active inductor with ability to tune its self-resonance frequency and quality factor without affecting each other is presented in this letter. Using the input transistor of active inductor in cascoding ...
CMOS high-performance UWB active inductor circuit
(Institute of Electrical and Electronics Engineers Inc, 2016)
In order to maximize efficiency of the designed gyrator-based active inductor, advanced circuit techniques are used. Loss and noise are most important features of the AIs, where they should be low enough to have high-performance ...
Energy and data cooperation in energy harvesting multiple access channel
(Institute of Electrical and Electronics Engineers Inc., 2016-08-26)
We consider the energy harvesting two user Gaussian multiple access channel (MAC), where both users harvest energy from nature. The users cooperate at the physical layer (data cooperation) by establishing common messages ...
A discussion on spatiotemporal filtering on a third generation real-time cellular neural network processor
(IEEE Computer Society, 2016)
A third generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v3) is a CNN emulator currently being implemented targeting FPGA devices. Thanks to the frame buffer support of the RTCNNP-v3 it will be possible ...
Computer assisted sperm motility analysis implemented on hybrid CPU+FPGA architecture as an intelligent microscope application
(IEEE Computer Society, 2016)
In this paper we present a Computer Assisted Semen Analysis (CASA) system which is designed and implemented on a hybrid CPU+FPGA architecture platform. The sperm motility analysis deals with the dynamics of sperm movements, ...
On the way to a third generation real-time cellular neural network processor
(IEEE Computer Society, 2016)
In this proceeding, the architecture of a third generation Real-Time Cellular Neural Network (CNN) Processor (RTCNNP-v3) is disclosed, which is a digital CNN emulator to be implemented on an FPGA device. The previous ...
0.8-1.9 GHz mikrodalga kuvvetlendirici tasarımı
(IEEE, 2016-12-03)
Günümüzde haberleşmede kullanılan iletişim araçlarının tasarımı büyük bir gelişim ve değişim göstermektedir. İletişim araçları birçok sistemden oluşmaktadır. Bu çalışmada iletişimin sağlanmasında büyük öneme sahip olan ...