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dc.contributor.authorFatemi, Mohammad Reza Hosseinyen_US
dc.contributor.authorAteş, Hasan Fehmien_US
dc.contributor.authorSalleh, Rosli Binen_US
dc.date.accessioned2015-01-15T23:02:17Z
dc.date.available2015-01-15T23:02:17Z
dc.date.issued2013-05
dc.identifier.citationFatemi, M. R. H., Ateş, H. F. & Salleh, R. B. (2013). Analysis and design of low-cost bit-serial architectures for motion estimation in H.264/AVC. Journal of Signal Processing Systems, 71(2), 111-121. doi:10.1007/s11265-012-0686-2en_US
dc.identifier.issn1939-8018
dc.identifier.issn1939-8115
dc.identifier.otherWOS:000315444700003
dc.identifier.urihttps://hdl.handle.net/11729/491
dc.identifier.urihttp://dx.doi.org/10.1007/s11265-012-0686-2
dc.description.abstractVariable block-size motion estimation (VBSME) process occupies a major part of computation of an H.264 encoder, which is usually accelerated by bit-parallel hardware architectures with large I/O bit width to meet real-time constrains. However, such kind of architectures increase the area overhead and pin count, and therefore will not be suitable for area-constrained electronic consumer designs such as small portable multimedia devices. This paper addresses this problem by proposing two area efficient least significant bit (LSB) bit-serial architectures with small pin numbers. Both designs take advantage of data reusing technique in different ways for sum of absolute differences (SAD) computation and reading reference pixels, leading to a considerable reduction of memory bandwidth. The first architecture propagates the partial SAD and sum results and broadcasts the reference pixel rows whereas the second design reuse the SAD of small blocks and has a reconfigurable reference buffer leading to a better memory bandwidth when using hardware parallelism. The proposed designs benefit from several optimization techniques including an efficient serial absolute difference architecture, word length reduction by parallelism, bit truncation, mode filtering, and macroblock (MB) level subsampling, which significantly enhance their performances in terms of silicon area, throughput, latency, and power consumption. The first and second designs can support full search VBSME of 720 x 480 video with 30 frames per second (fps), two reference frames, and [-16, 15] search range at a clock frequency of 414 MHz with 29.28 k and 31.5 k gates, respectively.en_US
dc.description.sponsorshipWe would like to thank the anonymous reviewers for their helpful comments and suggestions. This work was supported in part by the Ministry of Higher Education, Malaysia, under Grant FRGS FP094/2007cen_US
dc.language.isoengen_US
dc.publisherSpringeren_US
dc.relation.isversionof10.1007/s11265-012-0686-2
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectH.264en_US
dc.subjectMotion estimationen_US
dc.subjectLow cost architectureen_US
dc.subjectBit-serialen_US
dc.subjectVLSI Architectureen_US
dc.subjectBit-serial architectureen_US
dc.subjectLeast significant bitsen_US
dc.subjectLow costsen_US
dc.subjectOptimization techniquesen_US
dc.subjectSum of absolute differences computationsen_US
dc.subjectVariable block-size motion estimationen_US
dc.subjectComputer hardwareen_US
dc.subjectCost benefit analysisen_US
dc.subjectDesignen_US
dc.subjectHardwareen_US
dc.subjectMotion Picture Experts Group standardsen_US
dc.subjectPixelsen_US
dc.subjectReconfigurable architecturesen_US
dc.subjectReconfigurable hardwareen_US
dc.titleAnalysis and design of low-cost bit-serial architectures for motion estimation in H.264/AVCen_US
dc.typearticleen_US
dc.description.versionPublisher's Versionen_US
dc.relation.journalJournal of Signal Processing Systemsen_US
dc.contributor.departmentIşık Üniversitesi, Mühendislik Fakültesi, Elektrik-Elektronik Mühendisliği Bölümüen_US
dc.contributor.departmentIşık University, Faculty of Engineering, Department of Electrical-Electronics Engineeringen_US
dc.contributor.authorID0000-0002-6842-1528
dc.identifier.volume71
dc.identifier.issue2
dc.identifier.startpage111
dc.identifier.endpage121
dc.peerreviewedYesen_US
dc.publicationstatusPublisheden_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.contributor.institutionauthorAteş, Hasan Fehmien_US


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